Institute of Information Theory and Automation

You are here

Department of Signal Processing

Publications ÚTIA: 
list

SP Logo Our group focuses on the research, development and implementation of advanced digital signal and image processing algorithms, mainly in the fields of telecom, audio processing and scene analysis (image segmentation, motion detection). We build on our experience with the Bayesian approach to recursive identification of linear systems with time variable parameters.

Our target platforms are Field-Programmable Gate Arrays (FPGAs). We are focused mostly on embedded SoC solutions based on Xilinx Kintex, Zynq and ZynqULTRASCALE+ devices programmed by Xilinx Vivado and SDSoC tools. We also use Matlab/Simulink or OpenCV library to specify, model and verify algorithms which we subsequently convert and synthesize to FPGAs using HLS tools. That is why we also study features which result in fast execution, small memory footprint, small chip area and low power consumption. This is achieved through designing new DSP algorithms or modifying the existing DSP algorithms and by exploiting advanced architectural properties of FPGA circuits. Our aim is not only to deal with the theoretical design of algorithms but also to help industrial partners to solve implementation issues in all their complexity.

Currently we focus our development mainly around Zynq and ZynqULTRASCALE+ FPGA family boards from Xilinx and from Trenz (industrial and automotive grade ones).

Our aim is not only to deal with the theoretical design of algorithms but also to help industrial partners to solve implementation issues in all their complexity. The key partner is Technical Development of SKODA AUTO a.s. where we have main competence in development electronic systems for testing Human-Machine-Interface.

The department also continues in developing methods of Bayesian statistics towards estimation of mixtures with different distribution of components. The theory is used in practical applications (The Municipality of the capital city Prague, Motol University Hospital) and also lectured in Faculty of Transportation Sciences CTU, Prague.

Our department participated in several RTD projects supported by Framework Programmes of the EU as well as national grant agencies. Nowadays our group takes part in RTD projects financed by ECSELJoint Undertaking.

Among further activities belongs e.g. long-term participation in development international technical standards in Working Groups ISO.

See presentations and videos for the Department of Signal Processing evaluation 9th March 2021.

2023-01-27 12:59

Department detail

Ing. Jiří Kadlec CSc.
Mgr. Milada Kadlecová
Ing. Lukáš Kohout
Ing. Raissa Likhonina Ph.D.
Ing. Radim Matulík
Doc. Ing. Ivan Nagy CSc.
Dr. Ing. Jiří Plíhal
Ing. Zdeněk Pohl Ph.D.
Doc. Ing. Evženie Uglickich CSc.
Duration: 2020 - 2021
The project TIE aims at creating a strategic infrastructure for urban policy management in the field of urban mobility. This will be done by advancing the ability of cities to define, adopt, and implement policy recommendations that aim to improve mobility, based on a thorough understanding of the TIE’s components and resources, and how those components and resources interact with each other.
Duration: 2019 - 2022
Arrowhead Tools is Europe's largest project for solutions in automation and digitization for the industry. The purpose of the three-year project Arrowhead Tools is to create engineering tools for the next generation of solutions in digitization and automation for the European industry.
Duration: 2018 - 2021
The objective of FitOptiVis is to develop a cross-domain approach for smart integration of image- and video-processing pipelines for CPS covering a reference architecture, supported by low-power, high-performance, smart devices, and by methods and tools for combined design-time and run-time multi-objective optimisation within system and environment constraints.
Duration: 2018 - 2021
The WAKEMEUP project objective is to set-up a pilot line for advanced microcontrollers with embedded non-volatile memory, design and manufacturing for the prototyping of innovative applications for the smart mobility and smart society domains. The already defined microcontrollers with 40nm embedded flash technology will be consolidated to build a solid manufacturing platform.
Duration: 2017 - 2020
SILENSE is an ECSEL JU standard (RIA) project. The SILENSE project will focus on using smart acoustic technologies and ultrasound in particular for Human Machine- and Machine to Machine Interfaces. Acoustic technologies have the main advantage of a much simpler, smaller, cheaper and easier to integrate transducer.
Duration: 2017 - 2020
Productive4.0 is one of the first Lighthouse projects funded under the ECSEL Joint Undertaking. The main aim is to create a user platform across value chains and industries, that especially promotes the digital networking of manufacturing companies, production machines and products.
2016-06-16
Ing. Raissa Likhonina from the Department of Signal Processing (ZS) received the Dean's prize of the Faculty of...
2011-04-14
Článek "Instruction Set Extensions for Multi-Threading in LEON3" presentovaný na konferenci DDECS 2010, IEEE...
2011-01-26
Naši kolegové Jan Schier a Bohumil Kovář získali Cenu za nejlepší článek (Best paper award) za svůj příspěvek Automated...