PANACHE is the ENIAC KET Pilot Line project addresses subprogram 6. Design technologies and 7. Semiconductor process and integration. PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative microcontrollers in Europe. The current 40nm technology platform as well as the already defined 55nm technology platform will be developed and consolidated in order to build a solid manufacturing platform on these technology nodes. This project will also extend to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture suitable with the 28 nm node.