Institute of Information Theory and Automation

Profile of the Signal Processing Group

Our group focuses on the research, development and implementation of advanced digital signal processing algorithms, mainly in the fields of adaptive control and audio processing. We build on our experience with statistics, namely with the Bayesian approach to system identification and modeling, as well as with the relevant fields of linear algebra.

Our target platforms are Field- Programmable Gate Arrays (FPGAs) and Digital Signal Processors (DSPs). We use Matlab/Simulink to specify, model and verify algorithms which we subsequently convert to C, VHDL or Handel-C and synthesize to HW. As such specialized solutions are likely to be used in embedded systems, we also research features which result in extremely fast execution, use little memory, a small chip area or have low power consumption. This is achieved both through designing new or modifying the existing DSP algorithms on the one hand and using architectural properties such as dynamic reconfiguration of FPGAs on the other...

Our aim is not only to deal with the theoretical design of the algorithms but also to help industrial partners solve implementation issues in all their complexity. The state-of-the-art DSP applications, such as wireless networking, mobile communications or audio enhancement systems, are used very often as components in embedded systems. Roughly speaking, this means that such applications are implemented by means of rather limited hardware resources on a dedicated chip. Naturally, the implementation has to respect the specifics of the target environment, e.g. limited memory, chip area and low power consumption.

The above-mentioned issues definitely call for a multidisciplinary approach. Typical embedded systems which we deal with are Field-Programmable Gate Arrays (FPGAs) or Digital Signal Processors (DSPs). We are currently developing advanced design tools linking the high-level design environments of Matlab/Simulink, Xilinx System Generator and VHDL with the tools for optimized physical design and for modular designs.

We have been a project partner in the ESPRIT project No. 33544 called “High- Speed Logarithmic Arithmetic Unit” and the IST project No. IST-2001-34016 of the name “Design Methodology and Environment for Dynamic RECONFigurable FPGA”, the first of which was aimed at implementing the logarithmic arithmetic as an effective solution for the floating-point computations in embedded devices while the latter at developing the design methodology for the dynamic reconfiguration of the Xilinx and Atmel devices as a means of the rapid implementation of complex algorithms in small and low-cost devices.

Besides several projects financed by the state, we are currently involved in the EU-funded IST project No. FP6-2004-IST-4-027611 entitled “Self-Adaptive Embedded Technologies for Pervasive Computing Architectures”, which explores possible applications of self-adaptation for the more efficient design of complex embedded systems.

The scientific profile of our department is complemented with activities which promote cooperation between academia and industry. We have been engaged in several national as well as European projects (Idealist FP7, IST World, COSINE) which help local IT organizations prepare or participate in large-scale projects within the 7th EU Framework Programme. As part of these activities, we have organized
several workshops and seminars for the potential applicants.

The department has a staff of 14 researchers, six of whom are working on their Ph.D. degrees.


Responsible for information: ZS
Last modification: 30.03.2008
Institute of Information Theory and Automation