Institute of Information Theory and Automation

PANACHE - Pilot line for Advanced Nonvolatile memory technologies for Automotive microControllers, High security applications and general Electronics

Project leader: Ing. Jiří Kadlec, CSc.
Department: ZS
Supported by (ID): 7H14006
Grantor: Foreign Grantor
Type of project: applicational
Duration: 2014 - 2017
Publications at UTIA: list

Abstract:

PANACHE is the ENIAC KET Pilot Line project addresses subprogram 6. Design technologies and 7. Semiconductor process and integration. PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative microcontrollers in Europe. The current 40nm technology platform as well as the already defined 55nm technology platform will be developed and consolidated in order to build a solid manufacturing platform on these technology nodes. This project will also extend to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based non-volatile memory architecture suitable with the 28 nm node.

Project team:

More info:

Grant ageement number: 621217
Call: ENIAC-2013-2
Responsible for information: ZS
Last modification: 21.07.2017
Institute of Information Theory and Automation